Our Process

Process Simplicity, Application Efficiency

The 3DGS patented manufacturing process is simple, elegant and consistent with traditional semiconductor techniques. Photosensitive glass ceramic wafers similar in size to semiconductor silicon wafers are sourced from 3DGS glass supplier partners.  During the 3DGS process, the wafers are masked, exposed to UV light, thermally processed, chemically etched, metallized and plated.

wafers

1. Start with blank APEX® Glass (Wafer or Panel)

  • Expose and pattern
wafer_B_v3

2. Bake the wafer to convert exposed regions into ceramic

3. Wet etch ceramic regions to form 3D

wafer

4. Plate open 3D vias and cavities with Copper

5. Plating Front & Backside Interconnections

wafer

6. Create IPD by Metal Sputtering;

7. PECVD SiOx, SiNx, TaN; ALD Al2O3, HFO, etc  

The process is high-volume, scalable, repeatable, precise and limitless in design possibilities. Due to its scalability and high-volume compatibility, the process delivers time-efficient, cost-saving benefits to customers.